Static random access memories (“SRAM”) include a plurality of cells disposed in rows and columns to form an array. SRAM cells include a plurality of transistors coupled to bit lines and word lines that are used to read and write a bit of data to the memory cell. Dual port SRAMs are a specific type of SRAM that enables multiple reads or writes to occur at approximately the same time. Conventional dual port SRAM structures include word lines in different metal layers, which causes different capacitive loading due to the different metal layers being used to route signals of the SRAM. Such different capacitive loading results in a disparity between operating times of the word lines, which affects the speed of the overall SRAM.
Some dual port SRAMs include “twisted” bit lines to provide symmetrical balance to a sense amplifier, which is used to sense data. However, SRAMs with twisted bit lines still suffer from data inversion issues.